CPE 200L: Digital Logic Design II Lab
Section: 1002
Course | Section | Credits | Instructor | Dates | Status | Call Number |
---|---|---|---|---|---|---|
CPE 200L | 1002 | 1 (1 max credits) | Sharma Saugat | Jun. 10, 2024 to Jul. 12, 2024 | Open | 54333 |
Description
Design of sequential circuits, finite state machines (FSMs), and arithmetic circuits. Timing analysis. Use of programmable logic devices (PLDs) and hardware description languages (HDLs). Assembly language.Prerequisites
Cpe 100 with a grade of C or better
Notes
This is an Internet class; refer to Canvas instructions at https://unlv.instructure.com.Summer Term registration policies are not the same as Spring and Fall. Failure to familiarize yourself with Summer Term registration policies and procedures may result in penalties. Courses must be dropped the business day prior to start date to avoid penalties. Visit the Summer Term website at summerterm.unlv.edu for complete registration and schedule information.- Drop Deadlines: 100% Refund: 6/7/2024 50% Refund: 6/14/2024 Last Day to Drop: 6/28/2024This data is for informational purposes only. Please see for a full catalog and more information.